ongrid/hack-verilog-n2t

AI Summary: This issue proposes adding a `lint` target to the project's Makefiles, utilizing Verilator's `--lint-only` mode to automatically check SystemVerilog code for common errors, style violations, and potential bugs. This will introduce automated code quality checks, improving the detection of issues like unused signals or uninitialized variables before they become problems.

AI Summary: The CI pipeline is slow because it reinstalls Icarus Verilog on every run, taking 30-45 seconds. The goal is to implement apt package caching using `actions/cache@v4` in `.github/workflows/ci.yml` to reduce this installation time to approximately 5 seconds on subsequent runs.