Open-source high-performance RISC-V processor

chisel microarchitecture risc-v
1 Open Issue Need Help Last updated: Sep 5, 2025

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AI Summary: This issue describes a possible bug in the statistical corrector (SC.scala) concerning its write conflict and forwarding mechanism. The reporter suspects a flaw when a read operation targets an index that has pending write data in the `conflict_buffer` due to a previous read-write conflict, implying incorrect data forwarding in this specific scenario.

Complexity: 4/5
good first issue type: bug/fixed

Open-source high-performance RISC-V processor

Scala
#chisel#microarchitecture#risc-v