Open Issues Need Help
View All on GitHubAI Summary: The task is to create a simple web-based counter that automatically increments and updates its displayed value every 2-3 seconds without a manual refresh. It requires basic HTML for structure, JavaScript to manage the counter logic using `setInterval()`, and optional CSS for styling.
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
AI Summary: This GitHub issue requires the implementation of a 2:1 multiplexer. The task involves deriving its Boolean expression, creating block and circuit diagrams using basic logic gates, and then writing Verilog HDL code for the multiplexer along with a comprehensive testbench to verify its functionality.
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
AI Summary: This GitHub issue tasks contributors with implementing three distinct digital multiplexers: a 2:1, a 4:1, and an 8:1. Each multiplexer should be coded as a separate function or class, ideally in Python, and include basic test cases to verify its functionality. The final submission requires placing the code in a specific directory structure.
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
AI Summary: This issue requires designing a Python class `Memory` to simulate a 256-byte memory for a hypothetical 8-bit CPU. The class must include `read(address)` and `write(address, data)` methods, initialize memory to zeros, and implement robust error handling for invalid 8-bit addresses or data. Comprehensive unit tests are also required for all functionalities and error conditions.
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
AI Summary: This GitHub issue requests the creation of a program that converts a given binary number, provided as a string, into its equivalent Gray code. The conversion rule states that the Most Significant Bit (MSB) of the Gray code matches the binary's MSB, and subsequent Gray code bits are derived by XORing adjacent bits of the binary number. The input binary string can range from 1 to 64 characters.
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)
A SystemVerilog playground for Hacknight 7.0 featuring 21 standalone hardware design modules. (Forked from https://github.com/pranav0x0112/Twenty-One-Pilots)