Open Issues Need Help
View All on GitHub feat: SPICE-in-the-loop sizing refinement (stretch) about 3 hours ago
enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation
feat: PSRR− and fully-differential CMRR/PSRR SPICE testbenches about 3 hours ago
enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation
fix: square-law gm has no weak-inversion ceiling → analytical gm/gain over-optimistic about 1 month ago
bug enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation
bug enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation
fix: analytical metrics ignore fixed resistor-load / cap values about 1 month ago
enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation
fix: reliable SPICE slew-rate and output-swing measurements about 1 month ago
enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation
feat: CMRR and PSRR SPICE testbenches in spice_sim about 1 month ago
enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation
bug enhancement help wanted
A Python toolkit for analog circuit topology synthesis and recognition.
Python
#analog#analog-sizing#analog-synthesis#gmid#recognition#topology-generation