helion-fpga

helion-fpga/helion

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

11 good first / help-wanted issues · Rust · last activity Sep 3, 2026

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cad eda fpga fpga-programming open-source rust systemverilog
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11 Open Issues Need Help Last updated: Sep 3, 2026

Open Issues Need Help

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Lab: native FTDI/OFL STAT TDO DONE=1, then blink a real LED about 1 month ago
enhancement help wanted area:hw
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
Elaborator: lower public-widen SOFT (always/case/functions/memories/generates) about 1 month ago
enhancement help wanted area:sv
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
Docs: list the XDC/SDC commands load_xdc actually parses about 1 month ago
documentation help wanted good first issue area:docs
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
CI: add a macOS job that builds helion-ide about 1 month ago
enhancement help wanted
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
Project file survives restart: disk .hckp, incremental, ECO that still bitgens about 1 month ago
enhancement help wanted area:proj
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
Timing-driven P&R must move closed WNS on Ibex-class pin-wrap about 1 month ago
enhancement help wanted area:sta
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
Infer BRAM18 / MAC27 from $readmemh, ram_style, and a*b+c about 1 month ago
enhancement help wanted area:sv
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
SV: leftover backticks must not yield bad char backtick about 2 months ago
help wanted area:sv
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
IDE: IdeModel test that Device floorplan keeps DRAWING_MIN_HEIGHT about 2 months ago
help wanted good first issue area:ide
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
Docs: document the XDC subset helion-sta actually reads about 2 months ago
help wanted good first issue area:sta area:docs
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog
Docs: add Linux-only build notes to Start about 2 months ago
help wanted good first issue area:docs
helion-fpga/helion
0

Original FPGA family + CAD. Docs, wiki, and user guide on the Pages site. Contributors welcome.

Rust
#cad#eda#fpga#fpga-programming#open-source#rust#systemverilog