torch-spyre/ktir-cpu

[Story] Regex parser: support C++ custom assembly format for `inter_tile_produce/reduce` about 1 hour ago

bug enhancement good first issue

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

[Docs] Fix misleading linalg.matmul comment in LatencyEstimator._estimate about 1 month ago

good first issue refactoring

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

[Bug] linalg.reduce latency: charges output element count instead of deferring to combiner region about 1 month ago

bug good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

mlir_frontend path missing outs_operands and use_counts after #134 and #136 about 1 month ago

bug good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

[Feature] HBM/LX memory bootstrap: explicit placement API and allocation-aware next_ptr about 1 month ago

good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

[DistributedMemView] MLIRFrontendParser cannot parse distributed memory views (missing handler + per-core LX memory space) about 1 month ago

good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

linalg.reduce: multi-axis reduce and outs-init not handled per MLIR semantics about 1 month ago

good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

regex KTIRParser cannot resolve multi-result op references (%acc#0 / %acc#1) about 2 months ago

good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

Refactor ops/ layer: shared tile/scalar helpers at package level about 2 months ago

good first issue help wanted

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

[RFC conformance] Add RFC-explicit non-ktdp ops about 2 months ago

good first issue help wanted

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

Transformer decoder op coverage: gap analysis and MLIR examples about 2 months ago

good first issue help wanted

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

[Test] Add more dynamic-shape MLIR examples (varying dtypes, 2-D, multi-core) about 2 months ago

good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

Add distributed memory view examples and test_examples coverage about 2 months ago

good first issue

torch-spyre/ktir-cpu

5

A CPU interpreter and validator for KTIR (Kernel Tile IR), an MLIR-based tile-parallel IR for multi-core accelerator kernels.

Python

Open Issues Need Help