Open Issues Need Help
View All on GitHub [tooling] FPGA synthesis discards logs, ignores timing violations and ignores tool failures 2 months ago
bug good first issue Difficulty: easy tooling
aesc-silicon/elements-zibal aesc-silicon/elements-zibal Open Source RISC-V Microcontroller Unit
Open project →
9
Open Source RISC-V Microcontroller Unit
Scala
[cleanup] Remove the VexRiscv leftovers 3 months ago
good first issue Difficulty: easy tooling cleanup
aesc-silicon/elements-zibal aesc-silicon/elements-zibal Open Source RISC-V Microcontroller Unit
Open project →
9
Open Source RISC-V Microcontroller Unit
Scala
good first issue Difficulty: easy build
aesc-silicon/elements-zibal aesc-silicon/elements-zibal Open Source RISC-V Microcontroller Unit
Open project →
9
Open Source RISC-V Microcontroller Unit
Scala
[cleanup] Remove EmbenchIotTools 3 months ago
good first issue Difficulty: easy tooling cleanup
aesc-silicon/elements-zibal aesc-silicon/elements-zibal Open Source RISC-V Microcontroller Unit
Open project →
9
Open Source RISC-V Microcontroller Unit
Scala
good first issue Difficulty: easy tooling cleanup
aesc-silicon/elements-zibal aesc-silicon/elements-zibal Open Source RISC-V Microcontroller Unit
Open project →
9
Open Source RISC-V Microcontroller Unit
Scala