chipsalliance

chipsalliance/chisel

Chisel: A Modern Hardware Design Language

4.7K stars 652 forks 4.7K watchers Scala Apache License 2.0

chip-generator chisel chisel3 firrtl rtl scala verilog

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2 Open Issues Need Help Last updated: Jul 21, 2026

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Update docs/README.md about 4 hours ago

good first issue

chipsalliance/chisel

4.7K

Chisel: A Modern Hardware Design Language

Scala

#chip-generator#chisel#chisel3#firrtl#rtl#scala#verilog

Broken Links on Chisel-Lang.org docs about 1 month ago

good first issue

chipsalliance/chisel

4.7K

Chisel: A Modern Hardware Design Language

Scala

#chip-generator#chisel#chisel3#firrtl#rtl#scala#verilog